Cognitive Signal Processing in Ultra Low Power Analog 

This paper presents a programmable ultra-low power analog neuralsignal processing system. The analog hardware implements a nonlinear model that can replicate and predict, in real time, the temporal neural codes used in complex brain functions. The transistors of the analog circuits operate in weak-inversion. A digital control system is used to program model parameters and calibrate mismatches. The chip was implemented in a 130 nm CMOS technology and occupies an area of 1 square millimeter. The power consumption of the system is 120 nW. The modular design allows for easy scaling to achieve largescale hardware systems which emulate spike transformations of populations of neurons.